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RESEARCH ASSISTANT
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Office
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Bldg 3 Rm 308
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Telephone
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+86 10 8230 5403
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Fax
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+86 10 8230 5141
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Email
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xyang@semi.ac.cn
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Mailing Address
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Engineering Research Center of Semiconductor Integrated Technology，Institute of Semiconductors，Chinese Academy of Sciences，Beijing, P. O. Box 912，100083, P. R. China
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Biosketch
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Ph.D Microlectronics and solidstate electronics, Institute of Semiconductor,Chinese Academy of Science, Beijing, China July 2009
Research Area
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Nanoelectronics devices based on Si/SOI
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MEMS based on Si/SOI
Publications
(1) Lin Chen, Xiang Yang, Fuhua Yang, Jianhua Zhao, Jennifer Misuraca, Peng Xiong, and Stephan von Moln_ar, Enhancing the Curie Temperature of Ferromagnetic Semiconductor (Ga,Mn)As to 200 K via Nanostructure Engineering, Nano Lett., 11, 2584 ( 2011) (3)(SCI)
(2) Zhang Yanbo, Du Yandong, Xiong Ying, Yang Xiang,Han Weihua and Yang Fuhua, Drive current of accumulation-mode p-channel SOI-based wrap-gated Fin-FETs, Journal of Semiconductors, 2011, 32(9):094001 (EI)
(3)XiangYang, Weihua Han, Ying Wang, Yang Zhang, Fuhua Yang, Fabrication of silicon crystal-facet-dependent nanostructures by electron-beam lithography, Journal of Semiconductors, 2008, 29(6):1057-1061 (EI)
(4)Weihua Han, XiangYang,Ying Wang, Yang Zhang, Fuhua Yang, Jinzhong Yu Fabrication method of silicon nanostructures by anisotropic etching, 2008 5th International Conference on Group IV Photonics, GFP, p 146-148, 2008 (EI)
(5)Ying Wang, Weihua Han, XiangYang, Jianjun Chen, Fuhua Yang Monostable-bistable transition logic element (MOBILE) model for single-electron transistors, International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT, p 393-395, 2008 (EI)
(6)Yanbo Zhang, Ying Xiong, Xiang Yang, Ying Wang, Weihua Han and Fuhua Yang
Experimental study on the subthreshold swing of silicon nanowire transistors，Journal of Nanoscience and Nanotechnology, v10，P1-4，2010（SCI）
(7)Zhang, Yang， Zhang, Renping; Han, Weihua; Liu, Jian; Yang, Xiang; Wang, Ying; Li, Chian Chiu; Yang, Fuhua ，Reduction of proximity effect in fabricating nanometer-spaced nanopillars by two-step exposure， Journal of Semiconductors, v 30, n 11, p 116001-1-4，November 2009(EI)
