吴南键，男，博士，研究员，博士生导师。
半导体研究所研究员、中国科学院大学教授、兼中国科技大学教授。1992年获日本国立电气通信大学电子工程系理学博士。1992年起分别任日本国立北海道大学助教、国立电气通信大学副教授。2000年起任中国科学院半导体研究所研究员和中国科学院研究生院教授，2015年起任中国科学院大学教授，2016年起兼中国科技大学教授。2009年起任日本静冈大学荣誉客席教授。
带领一支开展芯片设计和应用创新研究的优秀团队，主要从事仿生视觉片上系统芯片、神经网络图像并行处理芯片、高速图像传感器和极低功耗模拟集成电路芯片等设计和应用研究。 在国外内外学术杂志和国际会议发表论文200余篇，申请或取得专利100余项，负责和领导设计完成芯片40余款，部分成果发表在固态集成电路领域著名国际学术期刊Journal of Solid-State Circuits（JSSC）和著名国际会议IEEE International Solid-State Circuits Conference(ISSCC)上。
从1995年～1998年任日本文部省组建的大规模集成电路设计教育中心（VDEC）成员，2003起任中国科学院EDA中心学术委员会委员。国际电气与电子工程师协会（IEEE）会员，The 5th International Symposium on Photoelectronic Detection and Imaging (2013) 程序委员会共同主席，International Conference on Optoelectronics and Microelectronics Technology and Application 2014 程序委员会共同主席，中国光学工程学会常务理事，新一代移动通信无信网络与芯片技术国家工程实验室技术委员会委员，《半导体学报》副总编。
目前的研究领域及方向：
1）仿生视觉片上系统芯片
2）基于深度神经网络的图像并行处理芯片
3） 高速图像传感器设计
4）极低功耗数模混合集成电路设计
现招收博士生、硕博连读生和博士后
联系方式：
电话：（010）82304754 ； E-mail：nanjian@red.semi.ac.cn
代表性论文：
1）Zhao Zhang, Liyuan Liu, Member, Peng Feng, and Nanjian Wu, A 2.4–3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique, IEEE Trans. on Very Large Scale Integration Systems, VOL. 25, NO. 3, 929– 941(2017)
2）Jie Yang, Yongxing Yang, Zhe Chen, Liyuan Liu, Jian Liu, Nanjian Wu, A Heterogeneous Parallel Processor for High-Speed Vision Chip, IEEE Transactions on Circuits and Systems for Video Technology, DOI:10.1109/TCSVT. 2016.2618753
3.）Yongxing Yang, Jie Yang, Liyuan Liu, and Nanjian Wu, High-Speed Target Tracking System Based on a Hierarchical Parallel Vision Processor and Gray-Level LBP Algorithm, IEEE Transactions on Systems, Man, and Cybernetics: SYSTEMS, DOI: 10.1109/TSMC.2016.25239074.
4）Shuang-Ming Yu, Peng Feng, and Nan-Jian Wu, Passive and Semi-Passive Wireless Temperature and Humidity Sensors Based on EPC Generation-2 UHF Protocol, IEEE SENSORS JOURNAL, VOL. 15, NO. 4, p. 2403-2411, 2015
5）Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-jian Wu, Zhihua Wang, A 1000fps Vision Chip Based on A Dynamically Reconfigurable Hybrid Architecture of PE Array and Self-Organizing Map Neural Network,” 2014 International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers Page(s): 128-129 (2014)
6）Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-Jian Wu, and Zhihua Wang, A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network, IEEE Journal of Solid-State Circuits, Vol. 49, NO.9, 2067(2014)
7）Qi Zhang, Peng Feng, Zhiqing Geng, Xiaozhou Yan and Nanjian Wu, A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications, IEEE Transactions on Biomedical Circuits and Systems, Vol. 5, No. 1, pp:39-47 (2011)
8）Wancheng Zhang, Qiuyu Fu and Nanjian WU, A Novel Programmable Vision Chip Based on Multiple Levels of Parallel Processors, Journal of Solid-State Circuits, Vol. 46, No.9, pp. 2132-2147 (2011)
9）Peng Feng; Yunlong Li and Nanjian Wu, “An Ultra Low Power Non-volatile Memory in Standard CMOS Process for Passive RFID Tags”, IEEE Custom Integrated Circuits Conference(CICC), San Jose, CA , pp.713 - 716 , Sep. 2009
10）Wei Miao, Qingyu Lin, Wzncheng Zhang and Nan-Jian Wu, A Programmable SIMD Vision Chip for Real-Time Vision Applications, Journal of Solid-State Circuits, Vol. 43, 1470-1479 (2008)
11）Shenghua Zhou and Nan-Jian Wu, A Novel Ultra Low Power Temperature Sensor for UHF RFID Tag Chip, 2007 IEEE Asian Solid-State Circuits Conference (A-SSCC 2007), November 14, (2007)
12）Wancheng Zhang, Nan-Jian Wu, T. Hashizume, and S. Kasai, Novel Hybrid Voltage Controlled Ring Oscillators Using Single Electron and MOS Transistors, IEEE Trans. On Nanotechnology, Vol. 6, 146-157 (2007)
13）Xiaofei Kuang and Nan-Jian Wu, A fast-settling PLL frequency synthesizer with direct frequency presetting, 2006 IEEE International Solid-State Circuits Conference(ISSCC) Digest of Technical Papers Page(s):741 - 750(2006)
14）Xiaobin Ou and Nan-Jian Wu, Analog-Digital and Digital-Analog Converters Using Single-Electron and MOS Transistors, IEEE Trans. On Nanotechnology, Vol. 4, 722-729 (2005)